Logs out of the MP5103 when sent over remote commands. The web interface is logged out by closing the browser.
SCPI COMMAND REFERENCE
The Tektronix MPSU50-2ST is Tektronix's source measure unit in the MP5000 Series Modular Precision Test System (mainframe + SMU/PSU modules) family. Its SCPI remote-control interface exposes 16 commands across 3 subsystems - 8 settable and 8 queries - and every command is documented here with its parameters, accepted values, return format, and a copy-paste PyVISA example for automating test and measurement.
16
Commands
8
Settable
8
Queries
3
Subsystems
SCPI
Verified
2026-07-16
All commands
Queries the mainframe communication status and indicates whether the selected command interface is allowed to control the mainframe. It is useful for diagnosing communication problems when another protocol or user may be active.
remote?
Retrieves the identification string of the instrument. The string contains the manufacturer, model number, serial number, and firmware revision of the mainframe.
*IDN? Output: TEKTRONIX,MP5103,00000000,1.0.0
Sets the Operation Complete bit in the Standard Event Status Register when all pending selected device operations have been completed. It is used to synchronize program execution with instrument completion.
*OPC
Synchronizes command execution; the query returns when all pending overlapped commands have completed. It is commonly used to determine when preceding commands are finished.
*OPC?
Resets the instrument settings to their default values and clears the reading buffers. It also cancels all pending commands and any pending responses to previously received *OPC or *OPC? commands.
Sets or clears the bits of the Status Request Enable Register. The instrument returns a decimal value corresponding to the binary-weighted sum of all bits set in the register.
| Name | Type | Values | Description |
|---|---|---|---|
| n | integer | 0 - 255 | Value written to the Status Request Enable Register. |
*SRE 0
Sets or queries the Status Request Enable Register. Sending 0 clears the register; sending 32 sets the instrument for an SRQ interrupt, and the query returns a decimal value representing the binary-weighted sum of all set bits.
| Name | Type | Values | Description |
|---|---|---|---|
| n | integer | 0 - 255 | Value used to set or clear bits in the Status Request Enable Register. |
*SRE 0
Postpones execution of subsequent commands until all previous overlapped commands are finished. It is typically sent after the initiate trigger model command.
*WAI
Programs the Event Status Enable Register. The mask value sets the enabled bits in the standard event status register.
| Name | Type | Values | Description |
|---|---|---|---|
| mask | integer | 0 - 255 | Enable register bit mask. |
Read the Event Status Enable Register.
Reads the Standard Event Status Register.
Clears the status model registers and also clears the output queue.
*CLS
Reads or enables bits in the Status Request Enable Register. Writing 0 resets the enable bits to 0.
| Name | Type | Values | Description |
|---|---|---|---|
| value | integer | 0 - 255 | Bits to set in the Status Request Enable Register. |
Reads or sets the Status Request Enable Register. To reset the register bits to 0, use 0 as the parameter value.
| Name | Type | Values | Description |
|---|---|---|---|
| value | integer | 0 - 255 | Bit mask to read or set in the Status Request Enable Register. |
Reads the Status Byte Register. For common commands and TSP commands, bit B6 is the MSS (Message Summary Status) bit.